Nanoelectronics: Impacting on the Lines through Process and Design
One of the very interesting debates in today‚Äôs electronics industry ‚Äď perhaps the central debate ‚Äď is how nanotechnology will manifest itself in semiconductors and electronics development in the relatively near term.When speaking of nanoelectronics, one must define the topic because it is more than simply producing devices at nanometer process nodes. A useful definition beyond the obvious measure of the nano-length scale is the ability to take advantage of the novel properties enabled by that nanoscale (KJ Klabunde, 2001).
These nanoscale properties become particularly novel around 40 nanometers. While semiconductor production at a 65 nanometer process node becomes challenging due to issues of current leakage, power consumption, and heat dissipation, there are some techniques being applied that will enable us to likely continue CMOS technology, albeit with some significant changes compared to today. It‚Äôs not until the 45 nanometer scale that our current vision of the extensibility of CMOS is threatened. According to the International Technology Roadmap for Semiconductors (ITRS), this is expected to occur around 2010.
Should we try to extend the life of CMOS? Should we use nanotechnology to replace existing electronics structures? Or should we take a completely novel approach to semiconductor architecture, sending the field effect transistor (FET) the way of the vacuum tube? Current research and recent market developments illustrate each of these approaches.
A Sunnyvale, Calif.-based nanoelectronics start-up, Nanoconduction, is tackling the issue of extending the life of CMOS technology. While the company has not announced their product in the general market as of yet, it is engaging with customers and has wafers running in a pilot line. The details that have been released so far indicate that Nanoconduction is replacing the copper spreader in a heat sink with carbon nanotubes. Of course, this is utilizing the conductive rather than semiconductive properties of CNT. This implementation greatly lowers heat dissipation, returning CMOS to its place as a ‚Äúcool‚ÄĚ technology.
Late in 2004, Infineon announced that it had produced the world‚Äôs smallest nanotube transistor, with a channel length of only 18nm. A single single-walled carbon nanotube was used in this development. According to the company, the CNT transistor can deliver currents in excess of 15¬ĶA at a supply voltage of 0.4V, as compared to today‚Äôs norm of 0.7V. In fact, a current density 10 times that of silicon has been observed. This research was funded by Germany‚Äôs Federal Ministry of Education and Research (BMBF).
Shortly thereafter, Hewlett Packard announced that its researchers had proven that a crossbar latch technology they invented, which was patented in 2003, is indeed feasible. This research was supported by the Defense Advanced Research Projects Agency (DARPA). In the Journal of Applied Physics (97, 2005), three scientists from HP‚Äôs Quantum Science Research (QSR) group proposed and demonstrated a nanowire crossbar latch. When an electrically switchable layer ‚Äď only a few atoms thick ‚Äď is trapped between crossed wires, a bit of memory can be stored or a logic function can be performed at each intersection of wires. This, of course, would take us away completely from the silicon substrate FET.
Phil Keukes, the nanotechnology crossbar latch patent-holder and Senior Scientist in the HP QSR group said, ‚ÄúTransistors will continue to be used for years to come with conventional silicon circuits, but this could very well replace transistors in computers someday, just as transistors replaced vacuum tubes and vacuum tubes replaced electromagnetic relays before them.‚ÄĚ
It can be seen, looking at each of these technologies in turn, that they may be viewed as developments on a continuum, rather than a single disruptive technology. All three ‚Äď and likely many other ‚Äď approaches discussed in the current nanoelectronics ‚Äėdebate‚Äô will possibly occur in their time. The rate of incremental development between now and 2015 may be so gradual as to not appear disruptive to us, until we stand at the end of this process with ubiquitous nanoelectronics technology, and evaluate the progress that has been made.