Authors: Y-B Liao, M-H Chiang, W-C Hsu
Affilation: National Ilan University, Taiwan
Pages: 9 - 12
Keywords: finFET, gate-all-around (GAA)
To gain insights into device variability, device scalability and even circuit performance, more comprehensive simulation data are presented. FinFET shows the highest transconductances corresponding to aforementioned highest IDLIN and IDSAT. Regarding process variation, same W¬Si/D variation was accounted. The GAA cases have better immunity to dimension variation due to better electrostatics. For VDD scalability, similar impacts were predicted for all cases while IDLIN‘s stay almost unchanged near 0.6 V. Good supply bias scaling can be applied for low power design without degrading much performance. To further compare circuit performances, mixed-mode simulations were included. FinFET case outperforms GAA counterparts in inverter delay, benefited from higher drive current For speed consideration, FinFET design is suggested to be the optimal approach whereas the GAA devices provide good immunity to fin width variation.
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