Nanotech 2007 Vol. 1
Nanotech 2007 Vol. 1
Technical Proceedings of the 2007 NSTI Nanotechnology Conference and Trade Show, Volume 1

Nano Electronics & Photonics Chapter 2

Hybridization of CMOS with CNT-based Complementary Nano Electro-Mechanical Switch for Low-Leakage and Robust Embedded Memory Design

Authors: R.S. Chakraborty, S. Narasimhan and S. Bhunia

Affilation: Case Western Reserve University, United States

Pages: 134 - 137

Keywords: CNEMS, hybridization, leakage power, robust embedded memory design, bitline leakage

Embedded static random access memory (SRAM) that constitutes an integral part of nanoelectronic systems, experiences two major challenges with aggressive technology scaling: 1) exponential increase in leakage current [1] and 2) decrease in robustness of read/write/hold operation [1]. We propose, for the first time, integration of carbon nanotube (CNT) based nano electro-mechanical switches (NEMS) with CMOS-based SRAM to achieve significant improvement in: 1) leakage power in standby mode (~19X compared to the best existing technique) and 2) robustness of read/write operation due to bitline leakage reduction (~55X).

ISBN: 1-4200-6182-8
Pages: 726
Hardcopy: $139.95