Authors: L. Watkins, K.R. Perry, J.S. Hurley, B. Olson, B. Pain
Affilation: Clark Atlanta Univeristy, United States
Pages: 671 - 674
Keywords: wavelet transform, CMOS APS camera, low power, Subband Band Coding, prototyping
In this study, we seek to develop a low power, area efficient wavelet compression chip capable of reconstructing sharp images at acceptable noise levels. It can be used in conjunction with such devices as the 256 x 256 CMOS Active Pixel Sensor (APS) camera under developed at JPL , or because of its small size, incorporated on the image sensor itself. A software algorithm is used to simulate the hardware and yield predicted values prior to fabrication. We limit our focus to the two-coefficient Haar Wavelet and one level Subband Coding (SBC). These parameters allow us to best emulate hardware restrictions in software. As a result, the software algorithm should yield very close findings to those of the hardware. Zerotree Encoding, which is a less restrictive algorithm, is employed as a standard. Reported results from Zerotree Encoding for 8:1 compression of the 512 x 512 standard Lena image yield a Peak Signal-to-Noise Ratio (PSNR) of 43.3 dB. Our software results for 8:1 compression of the 256 x 256 Lena image yield a PSNR of 37 dB, which is quite good given the more restrictive nature of our algorithm.
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