Authors: S. Amon, D. Vrtacnik, D. Resnik, D. Krizaj, U. Aljancic and A. Levstek
Affilation: University of Ljubljana, Slovenia
Pages: 435 - 438
Keywords: JFET, self aligned gate, device isolation, smart sensors, MEMS
Self Aligned Gate JFET (SJFET) devices and circuits are reported. The problem of electrical isolation between devices on the same chip is realized through Self Aligned Gate approach, enabling the application of standard bipolar discrete device technology (no epitaxy etc.). SJFET structures and circuits are analyzed by 2D numerical device simulation. SJFET differential amplifier circuit modeling is reviewed as an example. On the basis of modeling, test SJFET structures were designed and fabricated. Measurements on test SJFET structures reveale reasonable agreement with modeling.
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