Authors: F. Assad, Z. Ren, D. Vasileska, S. Datta and M.S. Lundstrom
Affilation: Purdue University, United States
Pages: 388 - 390
Keywords: on-currents, MOS FETS
The continued evolution of Si technology hinges to a large extent on the ability to maintain high on-currents while achieving low off-currents. As we move from sub-micron to nanoscale technology, it is not at all clear that these often-contradictory requirements can simultaneously be met. In this talk, we establish ultimate limits for the on-current and compare them against the targets in the National Technology Roadmap for Semiconductors (NTRS). We present a simple theory to predict the on-current of a MOSFET in the limit of no scattering in the critical portion of the device. We show that current devices achieve about one-third of this ballistic limit on-current and that future devices will have to achieve about two-thirds of the ballistic limit in order to meet the NTRS on-current target.
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