Authors: L.B. Sipahi and T.J. Sanders
Affilation: Florida Institute of Technology, United States
Pages: 584 - 587
Keywords: modeling, simulation and statistical design of ICs, LNA in wireless communications, RF, cost and cycle time reduction in semiconductor IC manufacturing
In this study, an investigation into MOS (metal-oxide semiconductor) and bipolar LNAs (Low Noise Amplifiers) in terms of their circuit design and the electrical circuit parameters was conducted. As partially reported , we have been methodically investigating physics base modeling and statistical simulations of the bipolar LNAs in terms of their associated semiconductor device, and silicon processing parameters. Here we report the comparative analyses of the single-stage, common source n-channel enhancement MOS transistor and common emitter class A npn bipolar LNAs. These 2.4 GHz low noise amplifier circuits were studied in terms of their electrical circuit parameters such as NF (Noise Figure) and output gain. Then, their dependence on semiconductor device, and silicon processing parameters for both technologies were compared and discussed in detail. A feasibility of implementing the novel statistical approach methodology was further investigated.
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