Layout Verification and Correction of CMOS-MEMS Layouts

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The advent of CMOS micromachining has introduced new design rules for fabrication of integrated CMOS-MEMS devices. This paper presents a context dependent DRC algorithm to handle the issues related to pre-fabrication verification of such layouts. In addition, problems related to density control, specific to CMOS-MEMS designs, are discussed. An automatic slotter which introduces MEMS-compatible slot holes is presented and its capability demonstrated. Having such verification and correction tools which address the needs of integrated CMOS-MEMS designs will help reduce inte-grated MEMS design time.

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Journal: TechConnect Briefs
Volume: 1, Technical Proceedings of the 2001 International Conference on Modeling and Simulation of Microsystems
Published: March 19, 2001
Pages: 426 - 429
Industry sector: Sensors, MEMS, Electronics
Topic: Modeling & Simulation of Microsystems
ISBN: 0-9708275-0-4