Gupta V., Mukherjee T.
Carnegie Mellon University, US
Keywords: CAD, CMOS MEMS accelerometer, synthesis
An optimal layout synthesis methodology for CMOS MEMS accelerometers is presented. It consists of a parame-trized layout generator that optimizes design objectives while meeting functional specifications. The behavior of the device is estimated using lumped parameter analytical equa-tions. The design problem is then formulated into a non-lin-ear constrained optimization problem. Such an approach to automated design of MEMS devices helps the designer to explore design trade-offs efficiently. Synthesis of cell level devices is also required for structured design of integrated MEMS. Designs for a CMOS MEMS accelerometer for dif-ferent optimization objectives, as well as possible design trade-offs are discussed.
Journal: TechConnect Briefs
Volume: Technical Proceedings of the 2000 International Conference on Modeling and Simulation of Microsystems
Published: March 27, 2000
Pages: 150 - 153
Industry sector: Sensors, MEMS, Electronics
Topics: MEMS & NEMS Devices, Modeling & Applications, Modeling & Simulation of Microsystems
ISBN: 0-9666135-7-0