NSTI Nanotech 2009

Scalable manufacturing of room-temperature single electron transistors via “amphibious”

L.C. Brousseau
Quantum Logic Devices, US

Keywords: single-electron transistor, nanofabricattion, bottom-up process


Nanoelectronic devices represent functionally exciting capabilities over conventional electronics, due to their existence in the realm of quantum mechanics. However, manufacturing processes extrapolated from current technologies that seek to carve smaller and smaller features from large blocks of materials are doomed to failure. Taking cues from nature, which utilizes “bottom up” solution-based chemistry to assemble enormously complex systems from molecular building blocks, can be a fruitful path towards quantum circuitry. Described here is a scalable fabrication process for single electron transistors arrays that operate at room temperature. Low resolution lithography is used to define microelectronic features, while chemical self-assembly of quantum dot (“wet”) solutions provides for their precise placement to create double-tunnel-junction devices.
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