2008 NSTI Nanotechnology Conference and Trade Show - Nanotech 2008 - 11th Annual

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Clean Technology 2008

An Accurate and Versatile ED- and LD-MOS Model for High-Voltage CMOS IC Spice Simulation

B. Tudor, J.W. Wang, B.P. Hu, W. Liu, F. Lee
Synopsys, Inc., US

HVMOS, LDMOS, EDMOS compact, model, parameter, extraction

The paper presents a high-voltage compact MOSFET model that has been proven physically accurate and numerically robust for various and generations of high-voltage ED (extended drain) and LD (laterally double diffused) production CMOS process technologies. The model’s accuracy in handling currents, conductances and capacitances, and its scalability over bias, device geometry and temperature have been proved to be consistently better compared to existing solutions.

Nanotech 2008 Conference Program Abstract