2008 NSTI Nanotechnology Conference and Trade Show - Nanotech 2008 - 11th Annual

Partnering Events:

TechConnect Summit
Clean Technology 2008

MOSFET Compact Modeling Issues for Low Temperature (77 K - 200 K) Operation

P. Martin, M. Cavelier, R. Fascio, G. Ghibaudo
CEA-LETI Minatec, FR

MOSFET, low temperature, compact model

Advanced compact models are evaluated for simulation of mixed analog-digital circuits working at low temperature (77 to 200 K). This evaluation is performed on a dual gate oxide CMOS technology with 0.18 µm / 1.8 V and 0.35 µm / 3.3 V MOSFET transistors. A detailed temperature analysis of some physical effects is performed. Specific effects, such as anomalous narrow width effect or quantization of the inversion charge, are observed at low or intermediate temperature. Some improvements of compact models will allow a very accurate description of MOS transistors at low temperature.

Nanotech 2008 Conference Program Abstract