2007 NSTI Nanotechnology Conference and Trade Show - Nanotech 2007 - 10th Annual

Growth and Engineering of High Aspect-Ratio AAO Templates Integrated on Silicon Substrates

S. Choi and M. Daugherty
Enable IPC Corporation, US

nanowire, silicon, alumina, nanopore, template, CMOS

We have developed a CMOS-compatible process for manufacturing nanowires directly on silicon (or other) substrates. This process removes some of the steps for conventional nanowire manufacture. The result are highly-ordered, high aspect-ratio nanowires for use in a variety of applications (we are concentrating on cathodes for rechargeable lithium ion batteries).

Back to Program

Sessions Sunday Monday Tuesday Wednesday Thursday Authors Keywords

Nanotech 2007 Conference Program Abstract


Names, and logos of other organizations are the property of those organizations and not of NSTI.
This event is not open to the general public and NSTI reserves the right to refuse admission and participation to any individual.