Device Parameter Extraction from fabricated Double-Gate MOSFETs
T. Tsutsumi, Y. Liu, T. Nakagawa, T. Sekigawa, M. Hioki, E. Suzuki and H. Koike
National Institute of Advanced Industrial Science and Technology (AIST), JP
device parameter extraction, Double-Gate MOSFETs
Accurate spice simulation needs parameter extraction of the fabricated DG-MOSFETs with good electrical characteristics. However, it is very difficult to fabricate such good DG-MOSFETs, so that device parameter extraction of the fabricated DG-MOSFETs has been not reported yet. Our group already successfully fabricated the enough ideal Fin-type DG-MOSFETs to extract device parameters. Then, we have successfully extracted prime device parameters of the fabricated 105-nm DG-MOSFETs by giving close agreement between measurement and simulation data. Such device parameter values have obtained with accuracy using conventional MOSFETs' mobility model. It shows that device simulation for such fabricated-size DG-MOSFETs has precision for practical use, without new mobility model for DG-MOSFETs. We have also demonstrated that channel tail profiles of the source and drain dopant of DG-MOSFETs are very important and essential device parameter. Simulation data at all gate voltages to agree with measurement data of the electrical characteristics are never obtained even with any device parameter value. By appropriately giving tail profiles of source and drain as device parameters, the simulation data give closer agreement with the measurement data.
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Nanotech 2005 Conference Program Abstract