Authors: L. Zhang, M. Chan
Affilation: HKUST, Hong Kong
Pages: 533 - 536
Keywords: compact model, circuit simulation, i-MOS, verilog-A, open source
With the recent advance of CMOS technology to the 32nm range, there is a major concern to continue the scaling roadmap. Many new devices have been proposed, but selecting the right structure is not a simple task. A lot of activities have been devoted to develop compact models for the unconventional nano-transistors, in particular, Multigate CMOS. While the different groups have spent a lot of effort to develop compact model for Multigate CMOS devices, not much attentions have been devoted to the interface to circuit simulators. In this presentation, an effort to develop a common compact model development platform form and standard is described. It will be followed by a discussion on how the accelerated technology development may impact the traditional modeling methodologies. A new paradigm to incorporate modern software engineering methodology to shorten model development cycle will be discussed.