Authors: R. Narang, M. Saxena, R.S. Gupta, M. Gupta
Affilation: University of Delhi South Campus, India
Pages: 776 - 779
Keywords: modeling, p-n-p-n, pocket doped, tunneling FET
Tunnel FET working on the principle of band-to-band tunneling mechanism has come up as a promising candidate with advantages of going below the limitation of 60mV/decade sub-threshold slope, and lower leakage current and thus capable of reducing the power consumption and achieving energy efficient fast switching transistors. Pocket doped (also known as p-n-p-n TFET or tunnel source MOSFET) is a promising TFET architecture because of its advantage of steep band bending and reduction of barrier width to enhance the electric field at the tunneling junction and thus improving the tunneling current. The efforts are required in the direction of development of compact analytical models based on the device physics and working principle. This work is an attempt to model the device electrostatics of a pocket doped p-n-p-n TFET architecture by following a simple and physics based approach to obtain efficient and accurate expressions governing the device behavior. Accurately modeling the electrostatics at the tunneling junction is the most crucial factor, as this region determines the current component of the device. The modeling scheme is based on carrier concentration approach, wherein, the electrostatics in the channel region is computed by evaluating electron concentration in the channel region.