Nanotech 2011 Vol. 2
Nanotech 2011 Vol. 2
Nanotechnology 2011: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational

Compact Modeling Chapter 10

Complete Surface-Potential Modeling Approach Implemented in the HiSIM Compact Model Family for Any MOSFET Type
M. Miura-Mattausch, M. Miyake, H. Kikuchihara, U. Feldmann, S. Amakawa, H.J. Mattausch
Hiroshima University, JP

MOSFET threshold voltage: definition, extraction, and applications
M.B. Machado, O. Siebel, M.C. Schneider, C. Galup-Montoro
Federal University of Santa Catarina, BR

UF “Compact” Models: A Historical Perspective
J.G. Fossum
University of Florida, US

Compact Models for sub-22nm MOSFETs
Y.S. Chauhan, D. Lu, S. Venugopalan, T. Morshed, M.A. Karim, A. Niknejad, C. Hu
University of California Berkeley, US

Xsim: A Unified Compact Model for Bulk/SOI/DG/GAA MOSFETs
X. Zhou
Nanyang Technological University, SG

Compact Subthreshold Modeling of Rectangular Gate and Trigate MOSFETs
T.A. Fjeldly, U. Monga
Norwegian University of Technology, NO

A Fully Anlytical Model for Carbon Nanotube FETs including Quantum Capacitances and Electrostatics
L. Wei, D.J. Frank, L. Chang, H.-S.P. Wong
Massachusetts Institute of Technology, US

High-Voltage MOSFET Compact Modeling
E. Seebacher
austriamicrosystems AG, AT

Modeling of High Voltage Devices for ESD Event Simulation
Y. Zhou, J. Salcedo, J.-J. Hajjar
Analog Devices, Inc., US

Process Variability Modeling for VLSI Circuit Simulation
S.K. Saha
SuVolta, Inc., US

A Phase-Change Random Access Memory Model for Circuit Simulation
M. Chan
HKUST, HK

Modeling Strategies for Flash Memory Devices
A. Padovani, L. Larcher, P. Pavan
Università di Modena e Reggio Emilia, IT

Comparison and insight into long-channel MOSFET drain current models
L. Zhang
Peking University, CN

HiSIM-DG for Extracting Statistical Variations of Measured I-V Characteristics
Y. Shintaku
Hiroshima University, JP

Analytic potential model for asymmetricunderlap gate-all-around MOSFET
S. Wang
Peking University, CN

Modeling of the impurity-gradient effect in high-voltage MOSFETs
Y. Maekawa, K. Fukushima, A. Tanaka, H. Kikuchihara, M. Miyake, H.J. Mattausch, M. Miura-Mattausch
Hiroshima University, JP

Charge Partition in Lateral Nonuniformly-Doped Transistor
J. Zhang, X. Zhou, G. Zhu and S. Lin
Nanyang Technological University, SG

Modeling Bias Stress Effect on Threshold Voltage for Amorphous Silicon Thin-Film Transistors
C-H Shen
National Chiao Tung University, TW

Characterization and Modeling of Metal Finger Capacitors
N. Lu, R. Booth, D. Daley, E. Thompson, C. Putnam
IBM, US

The accurate Electro-Thermal Model of Merged SiC PiN Schottky Diodes
M. Zubert, L. Starzak, G. Jablonski, M. Napieralska, M. Janicki, A. Napieralski
Technical University of Lodz, PL

Single-walled Carbon Nanotube (CNT) Field Effect Transistor Device Modeling
H. Abebe, E. Cumberbatch
USC/ISI, US

Analytical Solutions to Model the Line Edge Roughness and its Effect on Subthreshold Behavior of DG FinFETs
U. Monga, T.A. Fjeldly
Norwegian University of Science and Technology, and University Graduate Center (UNIK), NO

Hot-Carrier-Induced Current Degradation in Deep Sub-Micron MOSFETs from Subthreshold to Strong Inversion Region
L. Shihuan
Nanyang Technology University, SG

The Application of RESCUER Software to Modelling of Coupled Problems in Modern Devices
M. Zubert, A. Napieralski
Technical University of Lodz, PL

Drain Induced Barrier Lowering (DIBL) Effect on the Intrinsic Capacitances of Nano-Scale MOSFETs
M.A. Karim, S. Venugopalan, Y.S. Chauhan, D. Lu, A. Niknejad, C. Hu
University of California at Berkeley, US


ISBN: 978-1-4398-7139-3
Pages: 854
Hardcopy: $199.95