Nanotech 2011 Vol. 2
Nanotech 2011 Vol. 2
Nanotechnology 2011: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational

Nano Electronics & Photonics Chapter 1

Underlap Channel Nanoscale Dopant Segregated Schottky Barrier SOI MOSFET for Low Power Mixed Signal Circuits

Authors: G.C. Patil, S. Qureshi

Affilation: Indian Institute of Technology Kanpur, India

Pages: 42 - 45

Keywords: Schottky barrier MOSFET, underlap channel, mixed signal performance, self heating effect

Abstract:
In this paper, nanoscale dopant segregated Schottky barrier (DSSB) SOI MOSFET with underlap channel has been proposed for low power mixed signal circuit applications. The results show that, due to underlap lengths at both source/drain (S/D) sides the leakage currents, short channel effects, self-heating effect and parasitic capacitances are significantly reduced in underlap DSSB SOI MOSFET as compared to conventional overlap structure. However, increased S/D series resistance due to voltage drops across underlap lengths reduces the drive current in strong inversion region. Inspite of this, the analog figures-of-merit such as transconductance, intrinsic gain and transconductance generation factor are improved in weak inversion region. Further, mixed-mode device-circuit simulation results of CMOS inverter and ring oscillator (RO) circuits show that, at VDD = 1 V power dissipation (PD) in underlap device is lower but the delay is higher as compared to overlap device. On the other hand, at lower supply voltage i.e. VDD = 0.5 V, both PD and delay are lower in underlap device. Further, the RO frequency at VDD = 0.5 V is higher in underlap device as compared to overlap device. This shows the suitability of underlap channel DSSB SOI MOSFET for low power high performance mixed signal circuits.

Underlap Channel Nanoscale Dopant Segregated Schottky Barrier SOI MOSFET for Low Power Mixed Signal Circuits

ISBN: 978-1-4398-7139-3
Pages: 854
Hardcopy: $199.95