Authors: H-W Cheng
Affilation: National Chiao Tung University, Taiwan
Pages: 721 - 724
Keywords: 16-nm, Multi-Gate-and-Multi-Fin Device, modeling, TCAD simulation, electrical characteristics, digital circuit
In this work, we estimate electrical characteristics including threshold voltage (Vth) and gate capacitance (Cg) of 16-nm-gate multi-gate-and-multi-fin FETs, and delay time of an inverter and static noise margin (SNM) of a 6T SRAM. Large-scale random-dopant-induced fluctuations of the aforementioned characteristics are further discussed with respect to different fin aspect ratio (AR = the fin height / the effective fin width), where the device characteristics are obtained by solving a set of 3D density-gradient equations coupled with Poisson equations as well as electron-hole current continuity equations  under our parallel computing system . Notably, an experimentally validated simulation  is also conducted to investigate the fluctuation property.