Papers:
What is a Transistor?
After 75 years of learning vacuum tube and solid state electronics in three human generations, we now come to the end of the complete understanding of what is a transistor. It is far beyond, eight [...]
Interface Traps in Surface-Potential-Based MOSFET Models
Surface or interface properties along the surface channel region have great influences on the MOSFET characteristics. The interface-trap density increases during the repeated program-erase cycling of non-volatile floating-gate and SONOS memory transistors. Thus, the compact [...]
Analytic MOSFET Surface Potential Model with Inclusion of Poly-Gate Accumulation, Depletion, and Inversion Effects
An analytic MOSFET surface potential model with inclusion of the poly-gate accumulation, depletion, and inversion effects is derived from the basic MOS device physics and its solution result is also discussed in this paper. By [...]
HiSIM-SOI: SOI-MOSFET Model for Circuit Simulation Valid also for Device Optimization
Sadachika N., Kusu S., Ishimura K., Murakami T., Kajiwara T., Hayashi T., Nishikawa Y., Yoshida T., Miura-Mattausch M., Hiroshima University, JP
SOI-MOSFETs are considered to be suitable for high performance as well as low power applications and its developments are tend to go toward the thinner SOI films to enhance the device characteristics. Thus compact models [...]
Embedded non–volatile memory study with surface potential based model
Garetto D., Zaka A., Quenette V., Rideau D., Dornel E., Clark W.F., Minondo M., Tavernier C., Rafhay Q., Clerc R., Schmid A., Leblebici Y., Jaouen H., STMicroelectronics, FR
Coupling coefficients calculation is known to be a critical issue in Non-Volatile Memory cell compact modelling. To this purpose, the accuracy of the capacitive network method can be significantly improved using the charge balance method, [...]
Dynamic Charge Sharing modeling for surface potential based models
Technology tuning by design means have been recently pointed out. Particularly, the possibility of back bias polarization (VB) to tune the threshold voltage (VT) has been commonly adopted in advanced devices. As a consequence the [...]
Effective Width Modeling for Body-Contacted Devices in Silicon-On-Insulator Technology
Body-Contacted (BC) devices are extensively used in silicon-on-insulator analog circuits to avoid kink effect. This effect is not desirable as it changes gain of device suddenly. But to make body-contact special layout schemes are used. [...]
Design study of CNT transistors layouts for high frequency analog circuits
CNTFET technology is examined for high speed analog circuits. Design guidelines are deduced based on a realistic extrinsic circuit model. Moreover, numerical device simulations are used to derive specifications for CNTFET compact models suitable for [...]
Analytical Modelling of Ballistic and Quasi-Ballistic Nanowires:Validation and Application to CMOS Architecture
We present here an unified analytic model for ballistic and quasi-ballistic Silicon Nanowire (SNW represented in figure 1). Starting from the classical flux method and using the Lundstrom/Natori approaches [1-2], we enhanced them by taking [...]
MOSFET-Like Carbon Nanotube Field Effect Transistor model
An analytical model that captures the essence of physical processes in a CNTFET’s is presented. The model covers seamlessly the whole range of transport from drift-diffusion to ballistic. It has been clarified that the intrinsic [...]
Compact Quantum Modeling Framework for Nanoscale Double-Gate MOSFET
A quantum mechanical modeling framework for ultra-thin body double-gate MOSFETs operating in subthreshold and near-threshold regime is presented. For subthreshold conditions, we have assumed that the electrostatics is dominated by capacitive coupling between the body [...]
Compact Model HiSIM-DG both for Symmetrical and Asymmetrical DG-MOSFET Structures
In this work, the circuit simulation model for DG-MOSFET named HiSIM-DG, has been developed based on the complete surface-potential-based description. The model solves the Poisson equation to the vertical direction iteratively in quasi-2 dimensions including [...]
A Unified Compact model for FinFET and Silicon Nanowire MOSFETs
A unified compact model for FinFET and Silicon Nanowire (SiNW) MOSFETs including all major short channel effects is presented. Source-Drain symmetry, which is a fundamental feature of an ideal MOSFET, is preserved. The unified compact [...]
Computation Efficient yet Accurate Surface Potential Based Analytic Model for Symmetric DG MOSFETs to Predict Current-Voltage Characteristics
Song Y., Zhang J., Zhang L.N., Zhang J., Zhang L.N., Zhuang H., Che Y.C., He J., Chan M., Peking University, CN
A computation efficient yet accurate surface potential-based analytic model for the symmetric double-gate MOSFETs is proposed to simulate double-gate device current-voltage characteristics in this paper. This model consists of a surface potential versus voltage input [...]
Compact Modeling of Dynamic Threshold Voltage of FinFET High K Gate Stack and Application in Circuit Simulation
Compact modeling study of dynamic threshold voltage of FinFET high K gate stack is proposed in this paper. Both slow transient (STCE) and fast transient charging effect (FTCE) are included in this model. Finally, this [...]
High-Voltage MOSFET Model Valid for Device Optimization
Oritsuki Y., Sakuda T., Sadachika N., Miyake M., Kajiwara T., Kikuchihara U. Feldmann H., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP
Market for power devices are expanding due to the global warming problem. It is expected that the power devices play an important role for stopping the problem. For this purpose accurate compact models are highly [...]
Compare and Contrast HiSIM-LDMOS and BSIM based compact model of High Voltage MOSFETs for Analog Applications
A pair of scalable spectre models, one utilizes the Surface Potential based HiSIM-LDMOS model, and the other, the conventional Vth-based BSIM3v3 model, were extracted based on a test vehicle designed with both Drain-Extended CMOS and [...]
A Scalable POWER MOSFET Model with an Integrated Body-Diode Including Reverse Recovery
Traditional high-voltage MOSFET models include parasitic source-bulk and drain-bulk diode models. However, these models are simplified diode models and lack some of the more detailed aspects of p-n junctions diodes such as breakdown voltage, advanced [...]
Compact Model Application to Statistical/Probabilistic Technology Variations
Zhou X., Zhu G., Srikanth M., Selvakumar R., Yan Y., Chandra W., Zhang J., Lin S., Wei C., Chen Z., Nanyang Technological University, SG
ULSI systems are designed by electronic design automation (EDA) tools with performance figures-of-merit (FOM) measured by SPICE circuit simulation, in which nonlinear transistors are modeled by the compact model (CM) with its nominal set of [...]
PSP Model Equations Extension for Statistical Estimation of Leakage Current in Nanometer CMOS Technologies Considering Process Variations
A novel analytical methodology is proposed for statistical leakage estimation of CMOS circuits considering statistical process variations. The goal of the proposed methodology is to obtain a time-efficient and accurate estimation of the PDF of [...]
Numerical Study of Carrier Velocity for P-type Strained Silicon MOSFET
Abstract In this paper, a numerical study of carrier concentration for P-type strained Silicon MOS is presented. Density of state proportion of Fermi-Dirac intergral that covers the carrier statistics to all degenerate level is studied [...]
RF Modeling of 45nm Low-Power CMOS Technology
Wang J., Li H., Pan L.H., Gogineni U., Groves R., Jagannathan B., Na M-H, Tonti W., Wachnik R., IBM Semiconductor Research and Development Center, US
As CMOS has grown to be one of the principle technologies for RF IC design, accurate modeling of MOSFETs at high frequencies becomes increasingly important. In this paper, we present an advanced RF modeling work [...]
Compact Model of Low – Frequency Noise in Nanoscale Metal-Oxide-Semiconductor Field Effect Transistors
At nanoscale device dimensions low frequency noise is dominated by one or more oxide traps capturing and emitting charge and generating large swings in the drain current or what is known as Random Telegraph Signal [...]
1/f Noise Modeling at Low Temperature with the EKV3 Compact Model
Advanced compact models are mandatory for simulation of mixed analog-digital circuits working at low temperature (77-200 K). In this work, the 1/f noise model introduced in the EKV3 model is evaluated. This evaluation is performed [...]
1/f Noise Model for Double-Gate FinFET Biased in Weak Inversion
1/f noise model of long channel lightly-doped FinFET biased in weak inversion has been described using Hooge’s theory. From the drain current equation and the channel conductance expression, the total number of carriers under the [...]
A Simple, Accurate Capacitance-Voltage Model of Undoped Silicon Nanowire MOSFETs
Gate-All-Around (GAA), or surrounding-gate, MOSFET is one of the most promising structures beyond bulk CMOS. In this paper, we present a simple, accurate C-V model of undoped silicon nanowire MOSFETs. Different with other models, proposed [...]
SPICE BSIM3 Model Parameters Extraction and Optimization for Low Temperature Application
The SPICE BSIM3v3.1 model parameters extraction and optimization strategy that we present here is applicable for a half micron technology and circuits operating at temperature ranging from -191 to 125 0C. The room temperature extraction [...]
An SOA Aware MOSFET Model for Highly Integrated, Analog Mixed-Signal Design Environments
Circuit simulations involving power devices often require additional checks comparing with generic low power applications. The burden lies with the individual designers to ensure that the power transistors are operating well within the Safe Operating [...]
Automatically Generated and Experimentally Validated System-Level Model of a Microelectromechanical RF Switch
In this work, we present a mixed-level model of an electrostatically actuated and viscously damped ohmic radio frequency (RF) microelectromechanical switch, which provides an accurate physical description of the device behavior and is suitable for [...]
Journal: TechConnect Briefs
Volume: 3, Nanotechnology 2009: Biofuels, Renewable Energy, Coatings, Fluidics and Compact Modeling
Published: May 3, 2009
Industry sector: Sensors, MEMS, Electronics
Topic: WCM - Compact Modeling
ISBN: 978-1-4398-1784-1