Nanotech 2009 Vol. 1
Nanotech 2009 Vol. 1
Nanotechnology 2009: Fabrication, Particles, Characterization, MEMS, Electronics and Photonics

Nano Electronics and Photonics Chapter 8

Castellated-Gate MOSFETs as Power Transistors for Nanometer CMOS and Post-CMOS Integrated Nanosystems

Authors: J.J. Seliskar

Affilation: HiperSem Inc., United States

Pages: 582 - 585

Keywords: CMOS, Nanosystem, I/O, Interconnect, PHY Layer, Analog, Mixed-Signal

Abstract:
Analysis of the constant-voltage scaling characteristics of Fully-Depleted Castellated Gate (FDCG) MOSFETs reveals near term opportunities for these devices as the replacement for the “thick oxide” I/O device in CMOS System-On-A-Chip (SoC) technologies (e.g. the power transistor). Looking forward to the era of post-CMOS Integrated Nanosystems, FDCG MOSFETs utilized as PHY layer devices may provide the essential interoperable infrastructure for existing and yet-to-be-defined nanoscale devices.

Castellated-Gate MOSFETs as Power Transistors for Nanometer CMOS and Post-CMOS Integrated Nanosystems

ISBN: 978-1-4398-1782-7
Pages: 702
Hardcopy: $179.95