An Accurate and Versatile ED- and LD-MOS Model for High-Voltage CMOS IC Spice Simulation

	Nanotech 2008 Vol. 3 Nanotechnology 2008: Microsystems, Photonics, Sensors, Fluidics, Modeling, and Simulation - Technical Proceedings of the 2008 NSTI Nanotechnology Conference and Trade Show, Volume 3 Chapter 7: Compact Modeling
	An Accurate and Versatile ED- and LD-MOS Model for High-Voltage CMOS IC Spice Simulation
Authors:	B. Tudor, J.W. Wang, B.P. Hu, W. Liu, F. Lee
Affilation:	Synopsys, Inc., US
Pages:	804 - 807
Keywords:	HVMOS, LDMOS, EDMOS compact, model, parameter, extraction
Abstract:	The paper presents a high-voltage compact MOSFET model that has been proven physically accurate and numerically robust for various and generations of high-voltage ED (extended drain) and LD (laterally double diffused) production CMOS process technologies. The model’s accuracy in handling currents, conductances and capacitances, and its scalability over bias, device geometry and temperature have been proved to be consistently better compared to existing solutions.
ISBN:	978-1-4200-8505-1
Pages:	940
Hardcopy:	$159.95

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