Nano Science and Technology Institute
Nanotech 2008 Vol. 3
Nanotech 2008 Vol. 3
Nanotechnology 2008: Microsystems, Photonics, Sensors, Fluidics, Modeling, and Simulation - Technical Proceedings of the 2008 NSTI Nanotechnology Conference and Trade Show, Volume 3
Chapter 2: Sensors & Systems

Silicon on ceramics - a new concept for micro-nano-integration on wafer level

Authors:M. Fischer, H. Bartsch de Torres, B. Pawlowski, M. Mach, R. Gade, S. Barth, M. Hoffmann, J. Müller
Affilation:Technische Universität Ilmenau, DE
Pages:157 - 160
Keywords:silicon on ceramic, black silicon, bonding of silicon to ceramics, wafer level packaging
Abstract:A new integration concept for silicon devices to ceramic substrates based on a new bonding technique between nano-scaled, modified Black Silicon and an adapted, unfired LTCC substrate is presented. The novel technique enables to combine advantages of silicon and ceramic technology, especially electrical and fluidic interconnects from nm- to mm-scale. Current bonding concepts of silicon on ceramics need joining materials like solders, adhesives or glass frits. Alternatively, silicon components can be mounted to a TCE-matched and fired LTCC by anodic bonding, which requires costly surface preparation by polishing. This step is eliminated by the use of the new technique. During a standard lamination process, a self-organized, nano-structured silicon surface is joined with the green ceramic body. Pressure assisted sintering allows the co-firing of the composite. Dense contact between the Black Silicon surface and the ceramic, leading to a maximum average bonding strengths of 1775 N/cm, is achieved by optimization of the nano-interface and the lamination procedure. First leak-tightness measurements show leak rates up to 1.9 10-8 mbar l/s. Electrical interconnects between ceramic body and silicon have been realised by means of metalized BSi penetrating into LTCC conductors The new integration concept has been demonstrated by a fluidic chip cooling system.
Silicon on ceramics - a new concept for micro-nano-integration on wafer levelView PDF of paper
Order:Mail/Fax Form
© 2017 Nano Science and Technology Institute. All Rights Reserved.
Terms of Use | Privacy Policy | Contact Us | Site Map