Nanotech 2007 Vol. 3
Nanotech 2007 Vol. 3
Technical Proceedings of the 2007 NSTI Nanotechnology Conference and Trade Show, Volume 3

Compact Modeling Chapter 7

Theory of source-drain partitioning in MOSFET

Authors: A.S. Roy, C.C. Enz and J.M Sallese

Affilation: EPFL, Switzerland

Pages: 609 - 612

Keywords: MOSFET, charge patitioning

The Ward-Dutton (WD) partitioning scheme is used extensively to develop transient and high frequency advanced compact models for MOSFET devices. Recently it has been shown that WD partitioning fails for field dependent mobility or for laterally asymmetrical doping. This work is aimed at presenting a generalization of the partitioning concept.

Theory of source-drain partitioning in MOSFET

ISBN: 1-4200-6184-4
Pages: 732
Hardcopy: $139.95