Nano Science and Technology Institute
Nanotech 2007 Vol. 3
Nanotech 2007 Vol. 3
Technical Proceedings of the 2007 NSTI Nanotechnology Conference and Trade Show, Volume 3
 
Chapter 7: Compact Modeling
 

High Conentration of Interface Traps in MOS Transistor Modeling

Authors:Z. Chen, B.B. Jie and C-T Sah
Affilation:Xiamen University, CN
Pages:493 - 498
Keywords:MOST, MOSC, interface traps, SiO2, Si
Abstract:Modifications of the MOS capacitor and transistor characteristics by the presence of a high concentration of interface traps are described. Change or distortion of the gate/base voltage dependent characteristics are presented, such as the gate capacitance at high- and low-frequencies (with respect to the trapping frequencies), base recombiantion conductance and current (R-DCIV), drain and source currents. Parameters cover the basewell (body) impurity concentration of 1E16 to 1E19 cm-3 and interface trap concentration of 1E08 to 1E14 cm-2, corresponding to unstressed logic-RF and end-of-life memory transistors. A statistical-physics-based mathematical model equation is employed to cover all types of one-trapped-electron (or hole) interface traps including the short-range neutral and the long-range Coulombic trapping potential wells, respectively from spatially distributed random bond angles and lengths, and from isolated impurity ions.
High Conentration of Interface Traps in MOS Transistor ModelingView PDF of paper
ISBN:1-4200-6184-4
Pages:732
Hardcopy:$139.95
 
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