Compact Modeling

	Nanotech 2007 Vol. 3 Technical Proceedings of the 2007 NSTI Nanotechnology Conference and Trade Show, Volume 3 Chapter 7: Compact Modeling
-	Consistency of compact MOSFET models with the Pao-Sah formulation: consequences for small-signal analysis
	C. Galup-Montoro, M.C. Schneider and A.I.A. Cunha
	Federal University of Santa Catarina, BR
-	HiSIM2.4.0: Advanced MOSFET model for the 45nm Technology Node and Beyond
	M. Miura-Mattausch, N. Sadachika, M. Miyake, D. Navarro, T. Ezaki and H.J. Mattausch, T. Ohguro, T. Iizuka, M. Taguchi, S. Miyamoto, R. Inagaki and Y. Furui
	Hiroshima University, JP
-	A History of Electronic Traps on Silicon Surfaces and Interfaces
	C-T Sah, B.B. Jie and Z. Chen
	University of Florida, US
-	High Conentration of Interface Traps in MOS Transistor Modeling
	Z. Chen, B.B. Jie and C-T Sah
	Xiamen University, CN
-	Analytical Solutions for Long-Wide-Channel Thick-Base MOS Transistors I. Effects of Remote Boundary Conditions and Body Contacts
	B.B. Jie and C-T Sah
	Peking University, CN
-	Compact Modeling Framework for Short-Channel DG and GAA MOSFETs
	H. Børli, S. Kolberg and T.A. Fjeldly
	Norwegian University of Science and Technology, NO
-	Modeling of Saturation-Region Characteristics of Nanoscale Double-Gate MOSFETs
	J.G. Fossum and S. Chouksey
	University of Florida, US
-	A Versatile Multigate MOSFET Compact Model: BSIM-MG
	C. Hu, M. Dunga, C-H. Lin, D. Lu, A. Niknejad
	University of California, Berkeley, US
-	3-D Analytical Models for the Short-Channel Effect Parameters in Undoped FinFET Devices
	H.A. Hamid, B. Iniguez and J. Roig
	Universitat Rovira i Virgili, ES
-	A PSP based scalable compact FinFET model
	G.D.J. Smit, A.J. Scholten, N. Serra, R.M.T. Pijper, R. van Langevelde, A. Mercha, G. Gildenblat and D.B.M. Klaassen
	NXP Semiconductors, NL
-	A Unified View of Drain Current Models for Undoped Double-Gate SOI MOSFETs
	A. Ortiz-Conde and F.J. García Sánchez
	Simón Bolívar University, VE
-	Analytic Charge Model for Double-Gate and Surrounding-Gate MOSFETs
	B. Yu, H. Lu, W-Y Lu and Y. Taur
	UCSD, US
-	Unified Compact Model for Generic Double-Gate MOSFETs
	X. Zhou, G.H. See, G.J. Zhu, K. Chandrasekaran, Z.M. Zhu, S.C. Rustagi, S.H. Lin, C.Q. Wei and G.H. Lim
	Nanyang Technological University, SG
-	Carbon Nanotube Transistor Compact Model
	J. Deng, G.C. Wan and H.-S. Wong
	Stanford University, US
-	Modeling of FET Flicker Noise and Impact of Technology Scaling
	C.-Y. Chen, Y. Liu, S. Cao, R. Dutton, J. Sato-Iwanaga, A. Inoue and H. Sorada
	Stanford University, US
-	Modeling MOSFET Process Variation using PSP
	J.S. Watts, Y-M Lee and J-E Park
	IBM, US
-	Modeling Process Variations Using a Compact Model
	R. Murali and J.D. Meindl
	Georgia Tech, US
-	Simulating CMOS Circuits Containing Multiple FET Types Including the Geometric Dependence of Correlation between FET Types
	J-E Park, C-H Liang, J. Assenmacher, J. Watts, S-J Park and R. Wachnik
	IBM, US
-	Optimal Skew Corners for Compact Models
	N. Lu
	IBM, US
-	Impact of Gate Induced Drain Leakage and Impact Ionization Currents on Hysteresis Modeling of PD SOI Circuits
	Q. Chen, S. Suryagandh, J-S Goo, J.X. An, C. Thuruthiyil and A.B. Icel
	Advanced Micro Devices, US
-	Compact modeling of drain current in Independently Driven Double-Gate MOSFETs
	D. Munteanu, J.L. Autran, X. Loussier and O. Tintori
	L2MP-CNRS, FR
-	Explicit Short Channel Compact Model of Independent Double Gate Mosfet
	M. Reyboz, O. Rozeau, T. Poiroux, P. Martin, M. Cavelier and J. Jomaah
	CEA-LETI, FR
-	A Computationally Efficient Method for Evaluating Distortion in DG MOSFETs
	R. Salazar, A. Ortiz-Conde and F.J. García Sánchez
	Solid State Electronics Laboratory, VE
-	High Voltage MOSFET’s Modeling Review
	Y. Ma, M-C Jeng and Z. Liu
	Cadence Design System, Inc., US
-	Modeling the Geometry-Dependent Parasitics in Multi-Fin FinFETs
	M. Chan and W. Wu
	HKUST, HK
-	Analysis of Halo Implanted MOSFETs.
	C.C. McAndrew and P.G. Drennan
	Freescale Semiconductor, US
-	Modeling the electrical characteristics of FET-type sensors for biomedical applications
	M.J. Deen and M.W. Shinwari
	McMaster University, CA
-	Non-standard geometry scaling effects
	M. Schröter and S. Lehmann
	Technische Universität Dresden, DE
-	Theory of source-drain partitioning in MOSFET
	A.S. Roy, C.C. Enz and J.M Sallese
	EPFL, CH
-	Gummel Symmetry with Higher-order Derivatives in MOSFET Compact Models
	G.H. See, X. Zhou, K. Chandrasekaran, S.B. Chiah, Z.M. Zhu, G.H. Lim, C.Q. Wei, S.H. Lin and G.J. Zhu
	Nanyang Technological University, SG
-	A charge based compact flicker noise model including short channel effects
	A.S. Roy and C.C. Enz
	EPFL, CH
-	HiSIM-Varactor: Complete Surface-Potential-Based Model for RF Applications
	M. Miyake, N. Sadachika, K. Matsumoto, D. Navarro, T. Ezaki, M. Miura-Mattausch, H.J. Mattausch, T. Ohguro, T. Iizuka, M. Taguchi and S. Miyamoto
	Hiroshima University, JP
-	PTAT voltage generator based on an MOS voltage divider
	C. Rossi, C. Galup-Montoro and M.C. Schneider
	Universidad de la Republica, UY
-	LINFET: A BSIM class FET model with smooth derivatives at Vds=0
	L. Wagner and C.M. Olsen
	IBM Systems Technology Group, US
-	Charge-Based Threshold Voltage Definition for Undoped Single Gate and Symmetric Double Gate MOSFETs
	C. Galup-Montoro, M.C. Schneider and A.I.A. Cunha
	Universidade Federal da Bahia - UFBA, BR
-	A Carrier-Based Analytic Model for Undoped Ultra-Thin-Body Silicon-on-Insulator (UTB-SOI) MOSFETs
	J. He, W. Bian, Y. Tao, B. Li and Y. Chen
	Peking University, CN
-	An Explicit Carrier-Based Compact Model for Surrounding-Gate MOSFETs
	J. He, F. Liu, W. Bian, Y. Tao, W. Wu, K. Lu, T. Wang and M. Chan
	Peking University, CN
-	Body Bias Dependency of Substrate Current and Its Modeling for SOI Devices
	Y. Ma, M-C Jeng and Z. Liu
	Cadence Design System, Inc., US
-	Compact Models for Asymmetric Double Gate MOSFETs
	H.C. Morris, H. Abebe and E.C. Cumberbatch
	San Jose State University, US
-	Transition Point Consideration for Velocity Saturating Four-terminal DG MOSFET Compact Model
	T. Nakagawa, T. Sekigawa, T. Tsutsumi, M. Hioki, S. O’uchi and H. Koike
	AIST, JP
-	An Efficient Sectionalized Modeling Approach for Introduction of
	V. Milovanovic and S. Mijalkovic
	Delft University of Technology, NL
-	A Setup for Automatic MOSFET Mismatch Characterization under a Wide Bias Range
	H. Klimach, C. Galup-Montoro and M.C. Schneider
	Federal University of Santa Catarina, BR
-	An Approximate Explicit Solution to General Diode Equation
	J. He, Y. Tao, C. Yang, M. Feng, B. Li, W. Bian and Y. Chen
	Peking University, CN
-	Methodology and Design Kit Integration of a Broadband Compact Inductor Model
	M. Erturk, R. Groves and E. Gordon
	IBM, US
-	A Compact Model for Temperature and Frequency Dependence of Spiral Inductor
	Y.Z. Xu and J.T. Watt
	Altera Corporation, US
-	SPICE Modeling of Hook Shaped Idsat Curve for I/O 2.5V MOS Transistors
	P.B.Y. Tan, A.V. Kordesch and O. Sidek
	Silterra Malaysia Sdn. Bhd., MY
-	HiSIM- Replacement of BSIM4 in UDSM Circuit Simulations
	Y. Iino and I. Pesic
	Silvaco Japan, JP
-	Process Aware Hybrid SPICE Models using TCAD and Silicon Data
	Y. Mahotin, S. Tirumala, X. Lin and D. Pramanik
	Synopsys Inc., US
-	A Circuit Compatible Analytical Device Model for Nanowire FET Considering Ballistic and Drift-Diffusion Transport
	B.C. Paul, R. Tu, S. Fujita, M. Okajima, T. Lee and Y. Nishi
	Toshiba America Research, US
-	Numerical Modeling for Comparison of Emitter-Base Designs of InGaP/GaAs Heterojunction Bipolar Transistors
	J.M. Lopez-Gonzalez
	Universitat Politecnica de Catalunya, ES
-	Simulation of Buffer-Related Current Slump in AlGaN/GaN HEMTs
	K. Horio
	Shibaura Institute of Technology, JP
ISBN:	1-4200-6184-4
Pages:	732
Hardcopy:	$139.95

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