On Idlow with Emphasis on Speculative SPICE Modeling

	Nanotech 2006 Vol. 3 Technical Proceedings of the 2006 NSTI Nanotechnology Conference and Trade Show, Volume 3 Chapter 7: Compact Modeling
	On Idlow with Emphasis on Speculative SPICE Modeling
Authors:	Q. Chen, Z-Y Wu, A.B. Icel, J-S Goo, S. Krishnan, C. Thuruthiyil, N. Subba, S. Suryagandh, J.X. An, T. Ly, M. Radwin, J. Yonemura and F. Assad
Affilation:	Advanced Micro Devices, US
Pages:	831 - 834
Keywords:	alpha-power law model, Idlow, SPICE, compact model
Abstract:	An empirical correlation model of Idlow, the MOSFET drain current measured at Vgs=Vdd/2 and Vds=Vdd, where Vdd is the supply voltage, is proposed based on the alpha-power law model. It enables a comprehensive analysis of Idlow over a wide range of device geometry, supply voltage, and temperature in multi-threshold-voltage technologies. Built upon and verified by electrical-test data of 90nm partially-depleted (PD) silicon-on-insulator (SOI) technologies, the newly developed methodology provides practical and efficient guidelines to device target projection and target-based speculative SPICE model extraction.
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ISBN:	0-9767985-8-1
Pages:	913
Hardcopy:	$119.95

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