Nanotech 2006 Vol. 3
Nanotech 2006 Vol. 3
Technical Proceedings of the 2006 NSTI Nanotechnology Conference and Trade Show, Volume 3

Nano and Molecular Electronics and Photonics Chapter 1

A Defect Model for Metallic Carbon Nanotubes in Cell-based Logic Circuits

Authors: H. Hashempour and F. Lombardi

Affilation: Northeastern University, United States

Pages: 47 - 50

Keywords: CNTFET, metallic CNT, source-drain short FET, defect modeling

Abstract:
Carbon Nanotube based Field Effect Transistors (CNTFET) are promising nano scaled devices for implementing high performance, highly integrated, and low power circuits. The main component of a CNTFET is a single-wall <br>carbon nanotube (SWCNT); its conductance is determined by the so-called chirality of the tube and is extremely hard to control during manufacturing. Conducting nanotubes can lead to defective CNTFETs similar to source-drain short faults in Metal Oxide Semiconductor Field Effect <br>Transistors (MOSFET). This paper presents a model and a corresponding<br>detection technique for nano scaled defects arising from the presence of metallic carbon nanotubes. Using an optimal layout of CNTFET based circuits, such defects are modeled by traditional stuck-at faults (SSF) and detected by SSF test sets.


ISBN: 0-9767985-8-1
Pages: 913
Hardcopy: $119.95

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