Authors: H-M Chou, S-C Lo, J-H Tsai and Y. Li
Affilation: NCHC, Taiwan
Pages: 80 - 83
Keywords: processes variations, random dopant fluctuation, double gate, SOI, numerical simulation
As the gate length of MOSFET devices shrinks down below 100 nm, the fluctuation of major devices parameter, namely, threshold voltage (VTH), subthreshold swing, drain current (ID) and subthreshold leakage current duo to influences of processes variations becomes a serious problem. The fluctuation in conjunction with the scaling of the supply voltage may seriously the functionality, performance and yield of the corresponding systems. Random dopant fluctuation is one of the problems. Therefore, as scaling size of devices and developing of new transistor architecture, the random dopant fluctuation may be required to avoid so as improving the device integration.