Simulation of Dynamic NBTI Degradation for a 90nm CMOS Technology

	Nanotech 2005 Vol. 3 Technical Proceedings of the 2005 NSTI Nanotechnology Conference and Trade Show, Volume 3 Chapter 1: Nanoscale Device and Process Modeling
	Simulation of Dynamic NBTI Degradation for a 90nm CMOS Technology
Authors:	R. Wittmann, H. Puchner, L. Hinh, H. Ceric, A. Gehring and S. Selberherr
Affilation:	Vienna University of Technology, AT
Pages:	29 - 32
Keywords:	transistor reliability simulation, NBTI degradation, lifetime estimation
Abstract:	The NBTI degradation was systematically investigated for a 90nm p-MOSFET by simulation and experiment. The reaction-diffusion model was extended for NBTI simulations at arbitrary gate voltage, frequency, and duty cycle within a calibrated range. Long-time NBTI degradation was simulated up to 10 years in order to estimate the transistor lifetime under typical chip operation conditions.
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ISBN:	0-9767985-2-2
Pages:	786
Hardcopy:	$109.95

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