Nano Science and Technology Institute - NSTI  
Nano Science and Technology Institute   Home | Subscribe | Site Map  
  ABOUT | COURSES | EVENTS | PUBLICATIONS | LEADERSHIP | OUTREACH | NEWS | PRESS | JOBS | Nanotechnology Solutions
px
px fade_top
Publications
Nanotech 2008 CDROM
Nanotech 2007 CDROM
Nanotech 2006 CDROM
Nanotech 2005 CDROM
Nanotech 2004 CDROM
3 CDROM Special Offer
Nanotech 2008 Vol. 1
Nanotech 2008 Vol. 2
Nanotech 2008 Vol. 3
Nanotech 2007 Vol. 1
Nanotech 2007 Vol. 2
Nanotech 2007 Vol. 3
Nanotech 2007 Vol. 4
Nanotech 2006 Vol. 1
Nanotech 2006 Vol. 2
Nanotech 2006 Vol. 3
Nanotech 2005 Vol. 1
Nanotech 2005 Vol. 2
Nanotech 2005 Vol. 3
WCM 2005
Nanotech 2004 Vol. 1
Nanotech 2004 Vol. 2
Nanotech 2004 Vol. 3
Nanotech 2003 Vol. 1
Nanotech 2003 Vol. 2
Nanotech 2003 Vol. 3
Nanotech 2002 Vol. 1
Nanotech 2002 Vol. 2
Nanotech 2001 Vol. 1
Nanotech 2001 Vol. 2
MSM 2000
MSM 99
MSM 98
Index of Authors
Index of Keywords
Index of Affiliations
Library Request Form
Shopping Cart
Order Form
 
Publications Publications
Nanotech 2005 Vol. 2
p
 
Technical Proceedings of the 2005 NSTI Nanotechnology Conference and Trade Show, Volume 2
Nanotech 2005 Vol. 2
Technical Proceedings of the 2005 NSTI Nanotechnology Conference and Trade Show, Volume 2
 
Chapter 10: Inorganic Nanowires and Metallic Nano Structures
 

Wire-Streaming Processors on 2-D Nanowire Fabrics

Authors:T. Wang, M. Ben-Naser, Y. Guo and C. Andras Moritz
Affilation:University of Massachusetts at Amherst, US
Pages:619 - 622
Keywords:nanowire, nanowires array, nanoscale circuits, streaming processors
Abstract:In this paper, we describe our initial architectural designs based on nanowires (NWs). We call our initial integrated circuit systems Wire-Streaming Processors (WISP) because in these designs, in order to preserve the density advantages of nanodevices, data is streamed through the fabric with minimal control/feedback paths and intermediate values during processing are often stored on the wire without requiring explicit latching. We show detailed circuits developed on 2-D NW fabrics and show for the first time a complete 2-bit datapath and 3-bit opcode WISP design, WISP-0. We identify the challenges and show techniques to work around fabric-specific constraints. Our initial WISP-0 design successfully addresses many of the fabric-specific constraints achieving a density advantage of 40X compared to the projected 30-nm CMOS implementation. The work proposed here forms a key part of our effort to build NASICs: Nanoscale Application-Specific Integrated Circuits and it is based on extensive research on understanding emerging nanoscale device and fabrication constraints.
ISBN:0-9767985-1-4
Pages:808
Hardcopy:$165.00
 
Order:Mail/Fax Form
Special:3 CD Set — 15% off with Free Shipping
Up
nanoPRwire™
nanoPRwire
News Headlines
nano World news
 
 
 
 
px
© Nano Science and Technology Institute     About NSTI | Terms of Use | Privacy Policy | Contact