The Development of Next Generation BSIM for Sub-100nm Mixed-Signal Circuit Simulation

	WCM 2005 Technical Proceedings of the 2005 Workshop on Compact Modeling Chapter 3: WCM 2004 Invited Papers
	The Development of Next Generation BSIM for Sub-100nm Mixed-Signal Circuit Simulation
Authors:	X. Xi, J. He, M. Dunga, C-H Lin, B. Heyderi, H. Wan, M. Chan, A.M. Niknejad and C. Hu
Affilation:	University of California at Berkeley, US
Pages:	233 - 236
Keywords:	MOSFETs, compact modeling, surfacepotential-plus model, small dimensional effects
Abstract:	This paper describes the next generation BSIM model for aggressively scaled CMOS technology. New features in the model include more accurate non-charge-sheet based physics, completely continuous current and derivatives, and extendibility to non-traditional CMOS based devices including SOI and double-gate MOSFETs.
	View PDF of paper
ISBN:	0-9767985-3-0
Pages:	412
Special:	3 CD Set — 15% off with Free Shipping
Up