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 | WCM 2005
Technical Proceedings of the 2005 Workshop on Compact Modeling
Chapter 2: Poster Papers |
| | HiSIM-1.2: The Effective Gate Length Validation with the Capacitance Data | | Authors: | Y. Iino | | Affilation: | Silvaco Japan, JP | | Pages: | 207 - 210 | | Keywords: | compact model, parameter extraction, surface potential | | Abstract: | HiSIM-1.2 model parameter extraction and the resulted fit for the current voltage characteristics were reported at WCM-2004 (Boston, MA, 2004). The measurement curves were reproduced well. However, the Cgc (the gate to the shorted source/drain) capacitance simulations were found later to have the large discrepancy for the short channel length devices in spite of the good fit for the large one. The author who had been nurtured as a traditional compact model engineer had little consideration, although he tried, on the nature of HiSIM: the HiSIM capacitance as the gate charge derivative naturally depends on the MOS gate geometry. A length correction parameter for the effective channel length calculation clearly solved the disagreement. Despite the measure is simple, the significance shouldn t be overlooked. HiSIM effective geometry has to be validated electrically. The good fit on the DC curves does not guarantee the HiSIM capacitance behavior. Measurement and the HiSIM simulation for various devices will be reported at WCM-2005 poster session. Also, much clear view on HiSIM parameter extraction will be exhibited. | | ISBN: | 0-9767985-3-0 |
| Pages: | 412 |
| Hardcopy: | $120.00 |
| Special: | 3 CD Set — 15% off with Free Shipping |
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