WCM 2005
WCM 2005
Technical Proceedings of the 2005 Workshop on Compact Modeling

Poster Papers Chapter 2

Airgap and Line Slope Modeling for Interconnect

Authors: F. Badrieh and H. Puchner

Affilation: Cypress Semiconductor, United States

Pages: 203 - 206

Keywords: interconnect, airgaps, voids, field solver, line slope, backend, modeling, capacitance

Abstract:
We have devised a generic methodology for characterizing airgaps and line slope and including those features in interconnect modeling. The method is silicon-based and can be used to accurately model the impact on capacitance. Our main conclusion is that airgaps result in a significant reduction in capacitance at smaller space. Metal slope on the other hand kick in at moderate-to-large space and results in an increase in capacitance.

Airgap and Line Slope Modeling for Interconnect

ISBN: 0-9767985-3-0
Pages: 412