![]() | WCM 2005
Technical Proceedings of the 2005 Workshop on Compact Modeling
Chapter 2: Poster Papers |
The Surface-Potential-Based model HiSIM-SOI and its Application to 1/f Noise in Fully-Depleted SOI-MOSFETs | |
| Authors: | N. Sadachika, M.Md. Yusoff, Y. Uetsuji, M.H. Bhuyan, D. Kitamaru, H.J. Mattausch, M. Miura-Mattausch, L. Weiss, U. Feldmann and S. Baba |
| Affilation: | Graduate School of Advanced Sciences of Matter, Hiroshima University, JP |
| Pages: | 155 - 158 |
| Keywords: | SOI MOSFET, 1/f noise, circuit simulation model, surface potential |
| Abstract: | Fully-depleted SOI-MOSFET model HiSIM-SOI for circuit simulation is developed. HiSIM-SOI solves surface potentials at all three SOI-surfaces along the depth direction self-consistently. Besides comparison to measured I-V characteristics, the model is verified with 1/f noise analysis, sensitive to the carrier concentration and distribution along the channel. The carrier concentration increase of SOI-MOSFET results in enhanced 1/f noise in comparison with the bulk-MOSFET. Our results predict that further reduction of the silicon-layer thickness for achieving higher driving capability will cause unavoidable enhancement of the noise. |
![]() | View PDF of paper |
| ISBN: | 0-9767985-3-0 |
| Pages: | 412 |
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