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 | Nanotech 2004 Vol. 2
Technical Proceedings of the 2004 NSTI Nanotechnology Conference and Trade Show, Volume 2
Chapter 3: Compact Modeling |
| | Physics-Based Scalable Threshold-Voltage Model for Strained-Silicon MOSFETs | | Authors: | K. Chandrasekaran, X. Zhou and S.B. Chiah | | Affilation: | Nanyang Technology University, SG | | Pages: | 179 - 182 | | Keywords: | Threshold voltage, strained-silicon, conduction-band offset | | Abstract: | Interest in nanotechnology has grown explosively in recent years because of the potential to beneficially impact almost every aspect of our lives. In the future, we can expect technologies that exploit unique nanometer scale phenomena to be integrated into microscale and larger systems, providing “systems” with unprecedented functionality and performance. To achieve this vision, numerous integration science challenges must be solved. Such challenges include: coupling molecular level structures and devices to larger scale platforms and devices; combining “top-down” and “bottom-up” assembly to create new classes of functional materials or to manufacture an integrated system; controlling the interface between biological and non-biological components in one architecture; and coupling mechanical forces across nano, micro and macro scales, including the control of fluidic transport. This paper will highlight the nanoscience integration research initiative at the DOE Center for Integrated Nanotechnologies, a U.S. Department of Energy nanoscale science research center jointly operated by Los Alamos and Sandia National Laboratories. Success in these and other user-initiated challenges will change not only the way we think about “micro-machines,” but also the way in which they accomplish their ever more complicated tasks. | | ISBN: | 0-9728422-8-4 |
| Pages: | 519 |
| Hardcopy: | $150.00 |
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