 | Nanotech 2004 Vol. 2
Technical Proceedings of the 2004 NSTI Nanotechnology Conference and Trade Show, Volume 2
Chapter 2: Nano Scale Device Modeling |
| - | Impact of Quantum Mechanical Tunnelling on Off-leakage Current in Double-gate MOSFET using a Quantum Drift-diffusion Model |
| | M-A Jaud, S. Barraud and G. Le Carval |
| | CEA-LETI, FR |
| - | Methodology for Prediction of Ultra Shallow Junction Resistivities Considering Uncertainties with a Genetic Algorithm Optimization |
| | C. Renard, P. Scheiblin, F. de Crécy, A. Ferron, E. Guichard, P. Holliger and C. Laviron |
| | CEA-LETI, FR |
| - | Full-band Particle-based Simulation of Germanium-On-Insulator FETs |
| | S. Beysserie, J. Branlard, S. Aboud, S.M. Goodnick, T. Thornton and M. Saraniti |
| | Illinois Institute of Technology, US |
| - | A Technology-Independent Model for Nanoscale Logic Devices |
| | M.P. Frank |
| | University of Florida, US |
| - | Hierarchical Simulation Approaches for the Design of Ultra-Fast Amplifier Circuits |
| | J. Desai, S. Aboud, P. Chiney, P. Osuch, J. Branlard, S. Goodnick and M. Saraniti |
| | IIT/Rush University, US |
| - | Principles of Metallic Field Effect Transistor (METFET) |
| | S.V. Rotkin and K. Hess |
| | University of Illinois at Urbana-Champaign, Beckman Institute for Advanced Science and Technology, US |
| - | Ab Initio Simulation on Mechanical and Electronic Properties of Nanostructures under Deformation |
| | Y. Umeno and T. Kitamura |
| | Kyoto University, JP |
| - | Atomistic Process and Simulation in the Regime of sub-50nm Gate Length |
| | O. Kwon, K. Kim, J. Seo and T. Won |
| | Inha University, KR |
| - | Sub-Threshold Electron Mobility in SOI-MESFETs |
| | T. Khan, D. Vasileska and T.J. Thornton |
| | Arizona State University, US |
| ISBN: | 0-9728422-8-4 |
| Pages: | 519 |
| Hardcopy: | $79.95 |
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| Order: | Mail/Fax Form |
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