Nano Science and Technology Institute
Nanotech 2003 Vol. 2
Nanotech 2003 Vol. 2
Technical Proceedings of the 2003 Nanotechnology Conference and Trade Show, Volume 2

Chapter 4:

Nano Electronics

-Three-dimensional, Full-band, Quantum Modeling of Electron and Hole Transport Through Si/SiGe Nano-structures
 C. Rivas and R. Lake
 University of California, US
-Background Charge Insensitive Single-Electron Memory Devices
 K. Yadavalli, A. Orlov, G. Snider, K. Likharev and A. Korotkov
 University of Notre Dame, US
-Logic Optimization and Technology Mapping for CAEN
 P. Färm, E. Dubrova and H. Tenhunen
 IMIT, KTH, SE
-Clocked Quantum-dot Cellular Automata circuits
 R. Kummamurui, A. Orlov, C. Lent, G. Bernstein and G. Snider
 University of Notre Dame, US
ISBN:0-9728422-1-7
Pages:600
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