Authors: K. Nakamae, H. Ohmori and H. Fujioka
Affilation: Osaka University, Japan
Pages: 479 - 482
Keywords: yield predictor, integrated circuit manufacturing, simulation, particle-induced yield
A simple VLSI particle-induced yield predictor has been developed that allows us to predict the entire yield of VLSI and also to analyze the bottleneck processing steps and faults. Particles with spherical shape are generated in the production equipment for each VLSI processing step and are deposited on the wafer. The yield predictor accepts as inputs (a) layout description of the VLSI under analysis in GDS II format, (b) production flow data, (c) planned layer thickness data, and (d) particle parameters for each production equipment. The predictor was applied to 16Mbit DRAM to show its validity.