Authors: M. Kulkarni, K. Vasanath, J. Davis, S. Saxena and G. Pollack
Affilation: Texas Instruments, Inc., United States
Pages: 47 - 52
Keywords: MOSFET, dopant profiles, process synthesis, CMOS transistor design
As MOS transistor size shrinks to sub-quartermicron dimensions, accurate knowledge of the dopant concentration in various regions of the transistor is becoming more and more important for device simulations. We have developed a methodology to quickly and accurately predict the dopant profiles in source/drainextender (MDD) and pocket regions of CMOS transistors using a limited set of profile measurements. This, coupled with a method to study the effect of profile variations on transistor performance. is presented here. In the phenomenological modeling approach we propose here, we parameterize the measured profiles for a few design points carefully chosen using standard DOE techniques. The number of profile parameters is reduced by modeling the interdependencies of some of the parameters using response surface method (RSM), and determining a small subset of independent parameters. The profile parameters are then used in a two-step device design method. The first step relates process settings such as implant dose and energy to the profile parameters. In the second step, we model (using RSMs) device performances such as drive current, threshold voltage, and off current as functions of profile parameters using a tuned device simulator. This two-step modeling method helps separate the effects of process parameters from device design. The sets of models thus obtained provide a fast and accurate method of profile prediction and its use in device simulation.