Nano Science and Technology Institute
Nanotech 2001 Vol. 1
Nanotech 2001 Vol. 1
Technical Proceedings of the 2001 International Conference on Modeling and Simulation of Microsystems

Chapter 9:

Process Modeling

-Modeling of Deposition Process by Level Set Method
 H. Jung, O. Kwon, S. Yoon and T. Won
 Inha University, KR
-Layout Verification and Correction of CMOS-MEMS Layouts
 B. Baidya, K. He and T. Mukherjee
 Carnegie Mellon, US
-Diffusion Induced Stresses in Microstructures of MEMS
 F. Yang
 University of Rochester, US
-Semiempirical Direct Dynamics Trajectory Study of the Si+ (2P) + H2 -> SiH+ + H Reaction
 N. Cha├óbane, H. Vach and G.H. Peslherbe
 CNRS-Ecole Polytechnique, FR
-A Framework for Mask-Layout Synthesis Implementing a Level Set Method Simulator
 C-Y. Lee and E.K. Antonsson
 California Institute of Technology, US
-Bonding Pad Resistance. A Combined Approach
 G. Bouche, R. Gonella and E. Sabouret
 Technology Modeling STMicroelectronics, FR
-Time Series Modelling of Surface Topography Generated by Ultrasonic Machining Process
 V.S.R. Murti, B. Naga Prasada Rao and M. Krishna Reddy
 Osmania University, IN
ISBN:0-9708275-0-4
Pages:638
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