Semiconductor Device Modeling and Novel Structures Simulation

	Nanotech 2001 Vol. 1 Technical Proceedings of the 2001 International Conference on Modeling and Simulation of Microsystems Chapter 10: Semiconductor Device Modeling and Novel Structures Simulation
-	Numerical Simulation and Analytical Modeling of Strong-Inversion Gate Capacitance in Ultra-Short (30nm) MOSFETs
	C. Sudhama, O. Spulber, C. McAndrew and R. Thoma
	Motorola SPS, U.S.A.
-	Spatial Modulation of the Dielectric Permittivity and its Effect on the Spectral Responsivity of Heterodimensional Photodetectors
	F. Castro and B. Nabet
	Motorola Laboratories, U.S.A.
-	Improved Modified Local Density Approximation for Modeling of Size Quantization in NMOSFETs
	C. Jungemann, C.D. Nguyen, B. Neinhüs, S. Decker and B. Meinerzhagen
	Universitat Bremen, Germany
-	Impact of Non-Stationary Transport Effects on Realistic 50nm MOS Technology
	D. Munteanu, G. Le Carval and G. Guegan
	LETI, CEA/Grenoble, DMEL, France
-	A Qualitative Study on Global and Local Optimization Techniques for TCAD Analysis Tasks
	T. Binder, C. Heitzinger and S. Selberherr
	Technical University Wien, Austria
-	3-D Simulation and Modeling of Signal Isolation in RF/IF Circuits
	S. Bharatan, P. Welch, K.H. To, R. Thoma and M. Huang
	Motorola, Digital DNA Laboratories, U.S.A.
-	A Physics-Based Impact Ionization Model Using Six Moments of the Boltzmann Transport Equation
	T. Grasser, H. Kosina, M. Gritsch and S. Selberherr
	TU Wien, Austria
-	Substrate Current Simulations at Elevated Temperatures
	E. Lyumkis, R. Mickevicius, B. Polsky, G. Loechelt, A. Zlotnicka and R. Thoma
	Integrated Systems Engineering, Inc., U.S.A.
-	A Scalable RF Model of the Metal-Oxide-Metal (MOM) Capacitor
	G. Chunqi, D. Manh Anh, Z. Zheng and F. Boyland
	Chartered Semiconductor Manufacturing Ltd., Singapore
-	Semi-Empirical Approach to Modeling Reverse Short-Channel Effect in Submicron MOSFET’s
	S.B. Chiah, X. Zhou, K.Y. Lim, Y. Wang, A. See and L. Chan
	Nanyang Technological University, Singapore
-	A Model for Fully Depleted Double Gate SOI MOS Transistors Including Temperature Effects
	R. Gharabagi
	St. Louis University, U.S.A.
-	A Simplified Approach for Noise Parameter Transformation Between Common Emitter and Common Base InP DHBT
	Y.Z. Xiong, G.I. Ng, H. Wang, C.L. Tan and H. Yang
	Nanyang Technological University, Singapore
-	Using ‘Adaptive Resurf’ Technique and Field Plate Working to Improve the Safe Operating Area of n-type Drain Extended MOS Transistors
	B. Bakeroot, P. Moens, M. Vermandel and J. Doutreloigne
	University of Gent, Belgium
-	Broadband Millimeter Wave Finline Antenna Simulation and Performance
	J.S. Fu, C.L. Ng, Y. Kwang, E.K. Sia and C. Lu
	Nanyang Technological University, Singapore
-	Three-Dimensional Simulation of AlxGa1-xAs/GaAs Gradual Heterojunction Bipolar Transistor
	A.J. García-Loureiro, T.F. Pena, J.M. Lopez-González and Ll. Prat Viñas
	Univ. Santiago de Compostela, Spain
-	Simulation of Recess-Structure Dependence of Gate-Lag Phenomena in GaAs MESFETs
	K. Horio, Y. Mitani and A. Wakabayashi
	Shibaura Institute of Technology, Japan
-	Determination of Low-Frequency Noise Spectrum in Ion-sensitive Field Effect Transistors (ISFET's) Based on a Physical Model for Drift
	S. Jamasb, S.D. Collins and R.L. Smith
	Conexant Systems, U.S.A.
-	TCAD Modeling using a Neural Network Based Approach
	R. Matei, G. Dima and M.D. Profirescu
	University Politehnica of Bucharest, Romania
-	Modeling of Antipodal/BCSSS Transition for Millimeter Wave Finline High Q Local Injected Mixer
	E.K. Sia, J.S. Fu, C. Lu and S.H. Tan
	Nanyang Technological University, Singapore
-	Investigation of the Mechanism of Floating Node Assisted CMOS Latch-Up
	S-P. Sim, P. Guo, A. Kordesch, W.F. Chen, C-M. Liu, C.Y. Yang and K. Lee
	Santa Clara University, U.S.A.
-	Noise Modelling of Microwave Bipolar Transistors
	F. Patti, V. Miceli and B. Spagnolo
	Università di Palermo, Italy
-	A New Approach for the Extraction of Threshold Voltage for MOSFET’s
	J.S. Wong, J.G. Ma, K.S. Yeo and M.A. Do
	Nanyang Technological University, Singapore
-	Parallel Dynamic Load Balancing for Semiconductor Device Simulations on a Linux Cluster
	Y. Li, S-S. Lin, S-M. Yu, J-L. Liu, T-S. Chao and S.M. Sze
	National Chiao Tung University, Taiwan
-	Simulation of HgCdTe Double Layer Heterojunction Detector Devices
	G.T. Hess, T.J. Sanders, G. Newsome and T. Fischer
	Florida Institute of Technology, U.S.A.
-	A Comparative Study of Double-Gate and Surrounding-Gate MOSFETs in Strong Inversion and Accumulation Using an Analytical Model
	Y. Chen and J. Luo
	University of California Berkeley, U.S.A.
ISBN:	0-9708275-0-4
Pages:	638
Hardcopy:	$100.00
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