Nano Science and Technology Institute
MSM 2000
MSM 2000
Technical Proceedings of the 2000 International Conference on Modeling and Simulation of Microsystems
 
Chapter 7: Compact Modeling for Deep Submicron Devices
 

Modeling of On-Chip Simultaneous Swithcing Noise in VDSM CMOS Circuits

Authors:K.T. Tang and E.G. Friedman
Affilation:University of Rochester, US
Pages:313 - 316
Keywords:on-chip simulataneous switching noise, VDSM CMOS circuits
Abstract:On-chip simultaneous switching noise (SSN) has become an important issue in the design of power distribution networks in current VLSI/ULSI circuits. An analytical expression characterizing the simultaneous switching noise voltage is presented here based on a lumped
Modeling of On-Chip Simultaneous Swithcing Noise in VDSM CMOS CircuitsView PDF of paper
ISBN:0-9666135-7-0
Pages:741
Up
© 2014 Nano Science and Technology Institute. All Rights Reserved.
Terms of Use | Privacy Policy | Contact Us | Site Map