Authors: R.V.V.V.J. Rao, J. Joe, Y.W.M. Chia, K.S. Ang, H. Wang and G.I. Ng
Affilation: National University of Singapore, Singapore
Pages: 309 - 312
Keywords: semiconductor devices and materials, PHEMT, equivalent circuits, on-wafer short, S-parameter measurements
A simple and accurate method for extracting small-signal signal equivalent circuit for double heterojunction d-doped PHEMTs was developed. The circuit elements were extracted from the S-parameters of PHEMTs. Parasitic inductances Lg, Ld and Ls were determined from the on-wafer-short S-parameter data. We have observed skin effect on the series resistive elements of on-wafer-short, which has been given due consideration in our model. The parasitic pad capacitances Cpg and Cpd were calculated from the S-parameters of PHEMTs measured at drain bias of zero volts and gate bias at pinch-off condition. The source and drain resistances (Rs and Rd) of PHEMTs were determined after de-embedding the S-parameters of PHEMTs measured at forward gate bias voltage and zero drain bias voltage condition using already determined external parasitic elements. Finally, the model has been verified by comparing the measured S-parameter data under active bias condition against those calculated from the small-signal equivalent circuit.