Layout Synthesis of CMOS MEMS Accelerometers

	MSM 2000 Technical Proceedings of the 2000 International Conference on Modeling and Simulation of Microsystems Chapter 4: System-Level Modeling and Simulation of MEMS
	Layout Synthesis of CMOS MEMS Accelerometers
Authors:	V. Gupta and T. Mukherjee
Affilation:	Carnegie Mellon University, US
Pages:	150 - 153
Keywords:	synthesis, CAD, CMOS MEMS accelerometer
Abstract:	An optimal layout synthesis methodology for CMOS MEMS accelerometers is presented. It consists of a parame-trized layout generator that optimizes design objectives while meeting functional specifications. The behavior of the device is estimated using lumped parameter analytical equa-tions. The design problem is then formulated into a non-lin-ear constrained optimization problem. Such an approach to automated design of MEMS devices helps the designer to explore design trade-offs efficiently. Synthesis of cell level devices is also required for structured design of integrated MEMS. Designs for a CMOS MEMS accelerometer for dif-ferent optimization objectives, as well as possible design trade-offs are discussed.
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ISBN:	0-9666135-7-0
Pages:	741
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