Authors: A. Dewey, R.B. Fair, J. Jopling, J. Ding, T. Zhang, F. Cao, B. Schreiner and M. Pollack
Affilation: Duke University, United States
Pages: 142 - 145
Keywords: MEFS, micro fluidics, biochips, fluidic architecture
This paper presents the rationale, design, and simulation of next-generation microelectro fluidic system computational architectures for the emerging field of bioinformatics. Current microelectro fluidic processors (e.g. biochips) have largely dedicated architectures supporting relatively specialized applications. A more general microelectro fluidic system computational architecture is given involving a multi-drop bus, pipelined structure. Functional requirements are explained and results of performance modeling and analysis of the micro fluidic processor architecture are presented. In developing architectural concepts for micro fluidics, it is instructive to "map" fluidic computing concepts into electronic computing concepts to gain insight into useful organizational structures. With this linkage, issues of optimal ways to sequence data movement to affect the execution of an instruction apply to the movement of liquid to affect the execution of a protocol. Leveraging the extensive technology base of electronic computing architecture, the organization of a fluidic architecture is presented. Performance modeling and simulation studies are conducted to understand quantitatively issues of fluid operations, resource utilization, and overall application throughput.