Shadow Lithography for Nanoscale Patterning

Mar 23, 2008

Story and update courtesy of Jae-Hyung Chung and Keith Ritala, University of Washington

Organization: University of Washington, US
Lead Inventor: J.H. Chung
Industry Market: Electronics
Technology Contact: Keith Ritala, University of Washington-College of Engineering

Fabrication of structures smaller than 32 nanometers (nm) is a major challenge facing the creators of next-generation semiconductor and nanofluidic devices. In spite of advances in immersion and double patterning processes, conventional photolithography-based techniques run out of steam as features approach 22 nm and smaller. Extreme ultraviolet lithography (EUVL), X-ray and ion beam lithography, and nanoimprinting processes show promise, but significant barriers remain – not the least of which is the projected cost of high-volume production systems.

Shadow Edge Lithography (SEL) has been developed by Prof. Jae-Hyun Chung and his group at the University of Washington’s Mechanical Engineering Department to offer a low-cost, high throughput alternative to create features as small as 2 nm on silicon substrates. Based on techniques developed in the 1980’s, SEL uses the shadow effect in high-vacuum electron beam evaporation, where a patterned photoresist step feature on a tilted wafer “shadows” the line-of-sight from evaporation source to substrate.

The breakthrough at the UW results from use of an evaporated aluminum layer, instead of photoresist, as the shadow mask. The basic principle of the improved SEL technique is illustrated in A, below. Exact control over the height h of the aluminum step increases the precision of the width w of the resulting feature. In addition, a proprietary compensation method has been developed to provide uniform width control across the wafer as the source-to-substrate angle α changes. The result is a reliable, repeatable process that can be used to form 0-, 1-, or 2-dimensional positive or negative relief nanostructures such as nanowires and nanogaps with high resolution and throughput.

The second generation SEL process developed at the UW is attractive for semiconductor wafer manufacturing, as it does not require expensive short wavelength light sources, optics, or ion sources. In addition, it has shown to be particularly useful for forming nanofluidic channels for applications such as sensors, genetic analysis devices, and lab-on-a-chip diagnostic systems. Examples of nanochannels thus formed are shown in B, above. A recent innovation has been to superimpose two successive SEL parallel linear patterning cycles at right angles to one another, and use the intersection of the features as a template for arrays of quantum dot tunable light sources with strong potential for photonic and optoelectronic devices.

This work was supported by the National Science Foundation, the Centers for Disease Control, and the University of Washington. Patent protection is pending for the second-generation SEL process, and inquiries regarding prospective R&D and licensing opportunities are invited.

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