NSTI Nanotech 2009

Correlation between the thermal annealing and the memory behaviors of Ge nanocrystals synthesized by low-energy ion implantation technique

M. Yang, T.P. Chen, J.I. Wong
Nanyang Technological University, SG

Keywords: Ge nanocrystals, low-energy ion implantation, XPS, non-volatile memory


In this study, Ge nanocrystals (nc-Ge) distributed in the gate oxide near the gate of a metal-oxide-semiconductor (MOS) structure were fabricated by low-energy (4 keV) Ge ion implantation and subsequent annealing at different temperatures from 800 °C to 1100 °C. The correlation between the annealing temperature and the memory behaviors (charge trapping and charge retention) of the nc-Ge embedded SiO2 thin film is investigated. The transmission electron microscope (TEM) and the X-ray photoemission spectroscopy (XPS) measurements show the oxidation of nc-Ge, attributed to the local excess oxygen atoms near the nc-Ge. Capacitance-voltage (C-V) measurements show that the memory behaviors are affected by the annealing temperature. It is observed that the electron trapping decreases with annealing temperature. On the other hand, the percentage of charge loss is also a function of the annealing temperature. The decreased electron trapping capability is explained by the oxidation of nc-Ge, while the charge retention behavior is attributed to the two competing processes involved in the annealing, i.e., the formation of leakage paths formed by the Ge atoms diffused in the gate oxide and the blocking of the leakage paths due to the oxidation of the Ge leakage sites. The understanding about the correction between the annealing temperature and the memory behaviors is essential for the design of the novel non-volatile memory devices based nc-Ge synthesized using low-energy Ge ion implantation technique.
Program | Tracks | Symposia | Workshops | Exhibitor | Press |
Venue | News | Subscribe | Contact | Site Map
© Copyright 2008 Nano Science and Technology Institute. All Rights Reserved.