Performance study of Ballistic and Quasi-Ballistic on Double-Gate MOSFETs 6T SRAM cell
S. Martinie, M.-A. Jaud, D. Munteanu, O. Thomas, G. Le Carval, J.L. Autran
CEA LETI-MINATEC, FR
Keywords: double-gate MOSFETs, ballistic transport, quasi-ballistic transport, SRAM, CMOS inverter
Abstract:The impact of ballistic/quasi-ballistic carrier transport on the switch of a CMOS inverter and on the noise margin of a 6T SRAM cell, both based on Double-Gate MOSFETs (DGMOS), is analysed using mixed-mode simulation. To simulate ballistic and quasi-ballistic transport, we introduced the pioneering approach of quasi-ballistic mobility proposed by Rhew et al into a TCAD simulator. Finally, we demonstrate the direct relation between the nature of transport in the channel and the 6T SRAM cell static performances.