NSTI Nanotech 2009

1/f Noise Modeling at Low Temperature with the EKV3 Compact Model

P. Martin, G. Ghibaudo
CEA, LETI, Minatec, FR

Keywords: MOSFET, flicker noise, low temperature, compact model, EKV3

Abstract:

Advanced compact models are mandatory for simulation of mixed analog-digital circuits working at low temperature (77-200 K). In this work, the 1/f noise model introduced in the EKV3 model is evaluated. This evaluation is performed on a dual gate oxide CMOS technology with 0.18 µm / 1.8 V and 0.35 µm / 3.3 V MOSFET transistors. Experimental results on low frequency noise at room temperature and at 77 K for both n-MOSFET and p-MOSFET are presented. The flicker noise model introduced in EKV3 allows to fit experimental data in a very wide range, from weak to strong inversion.
 
Program | Tracks | Symposia | Workshops | Exhibitor | Press |
Venue | News | Subscribe | Contact | Site Map
© Copyright 2008 Nano Science and Technology Institute. All Rights Reserved.